Mentor Graphics Eldo Simulator
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TSMC Becomes First Foundry to Support Mentor Graphics Analog Circuit Simulator Eldo WILSONVILLE, Ore., April 3 -- Mentor Graphics Corp. and Taiwan Semiconductor Manufacturing Corporation (TSMC) established an industry milestone today when they announced a comprehensive multi-year agreement in which TSMC commits to supporting model parameter generation and qualification for Mentor's Eldo(TM) circuit simulator. This agreement enables TSMC to create, distribute, and support a process technology portfolio of fully qualified, TSMC process-specific Eldo model parameter libraries. The agreement covers all aspects of support infrastructure, and addresses the dependencies between transistor-level circuit simulation technology and the latest device modeling development required for TSMC's advanced process technology. The resulting advantage is a decrease in design cycle time for customers of both companies. The Mentor Graphics Eldo simulator enables customers to simulate the building blocks of system-on-chip (SoC) implemented in deep submicron (DSM) technologies providing the highest accuracy and performance, with the largest capacity currently available in the industry. In addition, the Eldo simulator is an entry point to Mentor's comprehensive DSM simulation technology offering, which includes radio frequency analysis (RF), DSM timing verification, and language based SoC designs. Eldo is one of the most widely used circuit simulators with over 20,000 licenses worldwide. Eldo is the core engine of the Mentor Graphics analog and mixed-signal product line, from a comprehensive device model library to multi-algorithms, offering high accuracy and robust convergence. ``Our decision to adopt the Eldo technology is purely customer driven,'' stated Mike Pawlik, vice president of corporate marketing at TSMC. ``As the pure-play foundry industry leader, we support the tools necessary to design on TSMC's leading technologies. Eldo is an industry leading analog circuit simulator and it is in our customer's best interest that we collaborate with Mentor to offer Eldo qualified models.'' Eldo Circuit Simulator Foundry Program: TSMC is the first pure-play foundry to participate fully in the Mentor Graphics comprehensive foundry support program for the Eldo circuit simulator. The program was initiated to improve model generation and characterization for deep submicron IC design ensuring first pass success of silicon. ``As the leading foundry in the world, TSMC's support of Eldo is of great service to our customers. We believe that the decision is a testament to the proven reliability and industry-leading performance of Eldo. Coupled with the commitment of both companies to deliver world class services and support, this is a collaboration that will provide chip designers with a more rapid design cycle,'' stated Jue-Hsien Chern, vice president and general manager of Mentor's deep submicron division. The Eldo foundry program from Mentor Graphics provides a complete business model, which enhances productivity by providing automation in model generation and qualification. The Eldo foundry support has been proven over an extended period of time and is expected to be widely accepted in foundries throughout the world. About TSMC: TSMC is the world's largest dedicated semiconductor foundry, providing the industry's leading process technology, library and IP options and other leading-edge foundry services. TSMC operates seven eight-inch wafer fabs (Fab 3, 4, 5, 6, TASMC, WSMC and WaferTech), and two six-inch wafer fabs (Fabs 1 and 2). In addition, the company has begun construction of a $1.2 billion joint venture fab with Philips Semiconductor, which is scheduled to open in Singapore in 2000. TSMC recently broke ground for Fabs 7 and 12, the company's first 12-inch wafer fabrication facilities. In 2000, TSMC expects to have the capacity for nearly 3.4 million 8-inch equivalent wafers. Fabrication processes offered by TSMC include CMOS logic, mixed-mode, volatile and non-volatile memory, and BiCMOS. TSMC's corporate headquarters are in Hsin-Chu, Taiwan. More information about TSMC is available through the World Wide Web at . About Mentor Graphics: Mentor Graphics Corporation is a world leader in electronic hardware and software design solutions, providing products and consulting services for the world's largest electronics and semiconductor companies. Established in 1981, the company reported revenues over the last 12 months of over $500 million and employs approximately 2,700 people worldwide. Company headquarters are located at 8005 S.W. Boeckman Road, Wilsonville, Oregon 97070-7777. World Wide Web site: . NOTE: Mentor Graphics is a registered trademark and Eldo is a trademark of Mentor Graphics Corporation. All other company and/or product names are the trademarks and/or registered trademarks of their respective owners. CONTACT: Anne Cirkel, Marketing Communications of Mentor Graphics Corp., 503-685-7934, or Anne.firstname.lastname@example.org; or Dan Holden of TSMC North America, 408-451-2282, or email@example.com; or Luis Lorenzana of The Benjamin Group, 415-352-2628, ext. 617, or firstname.lastname@example.org. Previous Page
Mentor Graphics has been widely used in courses here in the EECS department. The most popular applications in use are:Design Architect - schematic entryModelsim - verilog/vhdl simulationEldo - circuit simulation (spice-like)ICStation - integrated circuit layout entry and verificationDesign Manager - design database file managementCalibre/xCalibre - mask verification and parasitic extractionOther applications include:BoardStation - PCB designExpedition - PCB designMach TA - transistor-level dynamic timing analysisSST Velocity - static timing analysisFlextest & FastScan - DFT and ATPG toolsRunning on Unix/Linux:Note: to run Mentor software on a non-CAEN EECS department machine, the machine must be part of the software subscription program.Under /usr/caen/bin (which should be in your search path) are wrapper scripts for many but not all Mentor applications. These scripts set the proper environment variables for you and launch the application. Scripts include:da_ic (design architect)dmgr_ic (design manager)dve_ic (design viewpoint editor)ic (icstation)vsim (modelsim, along with associated executables: vcom, vdel, vlib, vlog, vmap and vdir)mgcdocs (on-line docs)eldonet (netlister)eldo (circuit simulator)xelga (analog waveform viewer)ezwave (general waveform viewer)calibre (drc/lvs)xcalibre (parasitic extraction)xcalibrate (extraction deck generation)v2lvs (verilog->lvs deck converter)fastscan (scan-based ATPG)flextest (partial scan ATPG)bsdarchitect (boundary scan)dftadvisormachcal (mach calibrator)mpa (mach pa power analysis)mta (mach ta)velocity (sst-velocity)These wrapper scripts use the version settings you select using the CAEN application swselect. If you haven't selected a version with swselect, the wrapper script will default to the latest stable version installed on the platform.
The executables are dmgr_ic(full projectmanager), da_ic(schematic editor),and eldo(circuit simulator)respectively. ezwave is the waveformviewer. Here is a template mgc_location_map whichincludes the standard libraries and the UMC180 library for use with da_ic and eldo.
Eldo can be run in standalone mode to simulatecircuits. You'll need to code netlists by hand. There are institutewide licenses for the stand alone simulator. If you are not going tobe doing schematic capture, but are going to type your netlist byhand, use this. The binaries are installed in the DCF as well as theFPGA and IE labs. Feel free to copy them to your hostel Linux PCs.Eldo works like any other SPICE, so if you are familiar with SPICEnetlisting, it should be smooth sailing. To simulate a circuit, createit in Xcircuit and generate a netlist. Add the required analysiscommands and include the MOS model files to get going. An extensiveEldo user guide (eldo_ur.pdf) should help point out the powerfulfeatures of the simulator. Manuals can be found in the$anacad/documentation directory. To setup Eldo, see the end ofthis section. Eldo can be downloaded from the FPGA lab machines Version 2008.2 is installed at /tools/Mentor/AMS_2008_2_IXL/ Copy this directory to a suitable location on your machine. (If you get the following error:\"/home/dhrid/Mentor/com/eldo: 358: Syntax error: Bad fd number\" Chage line 356 of that file from \"ulimit -s unlimited >& /dev/null\" to \"ulimit -s unlimited >/dev/null 2>&1\" The 2008.2 version may not work with newer kernels. For that download Version 2011.1 which is at /tools/Mentor/ams_11_1.ixl.tar, extract the contents and follow the installation instructions
Design Architect and Eldo from Mentor Graphics can be usedfor schematic capture and circuit simulation respectively. The VLSIlab in the EE dept. has license servers for these. You can installthese tools on your hostel(Linux) machines and use the VLSI lablicenses. Download the directory /pub/mentor_DAIC fromathreya. Under this, you see compressed archives of Design Architectand Eldo, and instructions for installation(Readme.pdf). Theinstructions are self explanatory. From design architect, you can drawschematics, invoke the circuit simulator and run analyses, and viewthe results. This file, alsoavailable in /pub/mentor_DAIC, outlines the procedure forinstalling and using the simulator. Detailed documentation can befound at icflow_home/shared/pdfdocs andicflow_home/shared/htmldocs for Design Architect and atAMS_2005.3/documentation for Eldo. If things don't work,
Eldo can be run in standalone mode to simulatecircuits. You'll need to code netlists by hand. There are institutewide licenses for the stand alone simulator. If you are not going tobe doing schematic capture, but are going to type your netlist byhand, use this. The binaries are installed in the DCF as well as theFPGA and IE labs. Feel free to copy them to your hostel Linux PCs.Eldo works like any other SPICE, so if you are familiar with SP